A New Technique for Low Power Double Tail Comparator Using Parallel Mechanism

Abstract

Comparators are the most analyzing unit in the analog to digital converters. In such situation we have to use the high speed and the low power consumption based comparators. Hence we are designing the comparators is more challenging when the supply voltage is smaller. To achieve high speed, larger transistors are required to compensate the reduction of supply voltage, which also means that more die area and power is needed. In this paper we are presenting the low power and high speed comparators even in small supply voltages. This comparator design having the small count of transistors which is used to reduce the delay time. Apart from technological modifications, developing new circuit structures which avoid stacking too many transistors if they do not increase the circuit complexity.