A GDI Approach to Various Combinational Logic Circuits in CMOS Nano Technology

Abstract

Gate Diffusion Input provides one of the effective alternatives in low power VLSI application. With the help of GDI, circuits requiring large number of transistors can be realized with the help of quite less number of transistors.  This approach tends to optimize various performance parameters such as area, delay, power dissipation. In this paper GDI cell has been applied in realizing various combinational circuits. One of the novel design has been proposed (XOR circuit using only nMOS) for providing low power in digital circuit. Based on simulation results their waveforms have been analyzed and various performance parameters have been calculated. These parameters are then compared to standard CMOS logic. The schematic and layout are drawn on 120nm technology file on a Dsch tool and their analysis is done on a Microwind 3.1 tool and BSIM simulator.