Low-Voltage, High Frequency CMOS Analog Multiplier (International Journal of Engineering and Computer Science, 2014)
A new CMOS voltage-mode Four-quadrant analog Multiplier is proposed and analyzed by applying inputs signals to set of Summation circuit and substractor. Based on the proposed multiplier circuit, a low voltage high performance CMOS four quadrant analog multiplier is designed and simulated by using 0.35 micron technology. The measured 3dB bandwidth is 15 MHz. Simple structure, low-voltage, low power, and high performance makes the proposed multiplier quite feasible in many applications