Development and Optimization of New Gated Integrator in Using Dummy Switch for Reading Very Low Energy Beams (International Journal of Engineering and Computer Science, 2025)
This work aims to make a scientific contribution to the reduction and development parasitic quantities linked to the measurement of very weak currents; in fact, the components electronics which constitute the measurement chain are imperfect in nature and present several faults such as offset voltage, bias current, injection charges, leakage currents and electronic noise. Failure to take charge of these quantities causes an error in the reading of the information. In the optics of wanting convert a current of the order of picoampere or a charge of the order of femtocoulomb, all elements of the measurement chain must be linear to maintain the relationship charge-voltage and current-voltage. However, the use of transistors in our integrator causes the injection of charge and leakage currents in the storage capacitor which disturb the useful signal. The major objective here will be to bring out these imperfections caused mainly by transistors and to propose a new integrator to reduce them. The simulation results show that the offset voltage has been reduced by , the injection charge by and the output noise by . The integrator thus produced amplifies and integrates both with a cut-off frequency of and a linearity coefficient of 0,66%.