FPGA Implementation of Adaptive Equalizer (International Journal of Engineering and Computer Science, 2014)
Channel imperfections deteriorates the quality of the transmitted signal. This results in high bit error rate on receiver side and hence makes it difficult for the receiver to recover the original signal. Channel response is dynamic in nature and in order to decrease the bit error rate adaptive equalizers are generally used at the receiver side. This paper presents the FPGA implementation of adaptive equalizer.