(untitled) (International Journal of Engineering and Computer Science, 2015)
In 21st the role of wireless communications is huge in daily life applications but still power consumption by the applications is still concerned area in field of digital signal processing. Low power DSP architecture is required in all applications. Wireless communication exhibits the highest energy consumption in wireless sensor nodes. Given their limited energy supply from batteries or scavenging, these nodes must trade data communication for on-the-node computation. Due to the increasing complexity of VLSI circuits and their frequent use in portable applications, energy losses in the interconnections of such circuits have become significant. In the light of this, an efficient routing of these interconnections becomes important. In the implemented design describes the design and implementation of the newly proposed folded-tree architecture for on-the-node data processing in wireless sensor networks, in addition of add the routing technique for the high communication. Measurements of the silicon implementation show an improvement of 10–20× in terms of energy as compared to traditional modern micro-controllers found in sensor nodes.