(untitled) (International Journal of Engineering and Computer Science, 2014)
This paper describes about BPSK demodulation using costas loop and implementing on a DSP kit. The demodulation process can be divided into three major subsections. First, since the incoming waveform is suppressed carrier in nature, coherent detection is required. The methods by which a phase-coherent carrier is derived from the incoming signal are termed carrier recovery. Next, the raw data are obtained by coherent multiplication, and used to derive clock-synchronization information. The raw data are then passed through the filter, which shapes the pulse train so as to minimize inter symbol-interference distortion effects. This shaped pulse train is then routed, along with the derived clock, to the data sampler which outputs the demodulated data. The codes for the PLL and the Costas loop are written in C language and implemented on the DSP kit ADSP 21060 [4,5]. The various input and output plots are observed on the SHARC (Super Harward Architecture) simulator and also on the Emulator.